bitkeeper revision 1.1277.1.9 (42669b73P7IEHFimy7hJD0wKH7v80w)

vcpu.c, process.c:
  correct handling for cr.iha

diff --git a/xen/arch/ia64/process.c b/xen/arch/ia64/process.c
index 3ddbc0519237a47338c5c5819e866a9f4d56ab36..221812123d160a743789d45446ec969c4c5df3b9 100644 (file)
--- a/xen/arch/ia64/process.c
+++ b/xen/arch/ia64/process.c
@@ -171,6 +171,10 @@ panic_domain(regs,"psr.ic off, delivering fault=%lx,iip=%p,ifa=%p,isr=%p,PSCB.ii
                else if (vector == IA64_INST_TLB_VECTOR)
                        vector = IA64_ALT_INST_TLB_VECTOR;
 //     }
+       if (vector == IA64_ALT_DATA_TLB_VECTOR ||
+           vector == IA64_ALT_INST_TLB_VECTOR) {
+               vcpu_thash(ed,ifa,&PSCB(ed,iha));
+       }
        PSCB(ed,unat) = regs->ar_unat;  // not sure if this is really needed?
        PSCB(ed,precover_ifs) = regs->cr_ifs;
        vcpu_bsw0(ed);

diff --git a/xen/arch/ia64/vcpu.c b/xen/arch/ia64/vcpu.c
index bb8fc4ac07902aaef86968a76fb2f406df968964..8ce8149dd9c12cd0381ca9016de17f2dea39c248 100644 (file)
--- a/xen/arch/ia64/vcpu.c
+++ b/xen/arch/ia64/vcpu.c
@@ -394,7 +394,10 @@ IA64FAULT vcpu_get_iim(VCPU *vcpu, UINT64 *pval)
 
 IA64FAULT vcpu_get_iha(VCPU *vcpu, UINT64 *pval)
 {
-       return vcpu_thash(vcpu,PSCB(vcpu,ifa),pval);
+       //return vcpu_thash(vcpu,PSCB(vcpu,ifa),pval);
+       UINT64 val = PSCB(vcpu,iha);
+       *pval = val;
+       return (IA64_NO_FAULT);
 }
 
 IA64FAULT vcpu_set_dcr(VCPU *vcpu, UINT64 val)
@@ -1138,11 +1141,13 @@ IA64FAULT vcpu_thash(VCPU *vcpu, UINT64 vadr, UINT64 *pval)
        UINT64 VHPT_addr = VHPT_addr1 | ((VHPT_addr2a | VHPT_addr2b) << 15) |
                        VHPT_addr3;
 
+#if 0
        if (VHPT_addr1 == 0xe000000000000000L) {
            printf("vcpu_thash: thash unsupported with rr7 @%lx\n",
                PSCB(vcpu,iip));
            return (IA64_ILLOP_FAULT);
        }
+#endif
 //verbose("vcpu_thash: vadr=%p, VHPT_addr=%p\n",vadr,VHPT_addr);
        *pval = VHPT_addr;
        return (IA64_NO_FAULT);